数字设计 原理与实践 英文pdf电子书版本下载

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1 INTRODUCTION 1

1.1 About Digital Design 1

1.2 Analog versus Digital 3

1.3 Digital Devices 6

1.4 Electronic Aspects of Digital Design 7

1.5 Software Aspects of Digital Design 9

1.6 Integrated Circuits 12

FOREWORD 15

1.7 Programmable Logic Devices 15

1.8 Application-Specific ICs 16

PREFACE 17

1.9 Printed-Circuit Boards 18

1.10 Digital-Design Levels 18

1.11 The Name of the Game 22

1.12 Going Forward 23

Drill Problems 24

2 NUMBER SYSTEMS AND CODES 25

2.1 Positional Number Systems 26

2.2 Octal and Hexadecimal Numbers 27

2.3 General Positional-Number-System Conversions 29

2.4 Addition and Subtraction of Nondecimal Numbers 32

2.5 Representation of Negative Numbers 34

2.6 Two s-Complement Addition and Subtraction 39

2.7 Ones -Complement Addition and Subtraction 44

2.8 Binary Multiplication 45

2.9 Binary Division 47

2.10 Binary Codes for Decimal Numbers 48

2.11 Gray Code 51

2.12 Character Codes 53

2.13 Codes for Actions, Conditions, and States 53

2.14 n-Cubes and Distance 57

2.15 Codes for Detecting and Correcting Errors 58

2.16 Codes for Serial Data Transmission and Storage 69

References 73

Drill Problems 74

Exercises 76

3 DIGITAL CIRCUITS 79

3.1 Logic Signals and Gates 80

3.2 Logic Families 84

3.3 CMOS Logic 86

3.4 Electrical Behavior of CMOS Circuits 96

3.5 CMOS Steady-State Electrical Behavior 99

3.6 CMOS Dynamic Electrical Behavior 113

3.7 Other CMOS Input and Output Structures 123

3.8 CMOS Logic Families 135

3.9 Bipolar Logic 145

3.10 Transistor-Transistor Logic 156

3.11 TTL Families 166

3.12 CMOS/TTL Interfacing 170

3.13 Low-Voltage CMOS Logic and Interfacing 171

3.14 Emitter-Coupled Logic 175

References 183

Drill problems 184

Exercises 188

4 COMBINATIONAL LOGIC DESIGN PRINCIPLES 193

4.1 Switching Algebra 194

4.2 Combinational-Circuit Analysis 209

4.3 Combinational-Circuit Synthesis 215

4.4 Programmed Minimization Methods 236

4.5 Timing Hazards 244

4.6 The ABEL Hardware Description Language 249

4.7 The VHDL Hardware Description Language 264

References 298

Drill Problems 301

Exercises 304

5 COMBINATIONAL LOGIC DESIGN PRACTICES 311

5.1 Documentation Standards 312

5.2 Circuit Timing 330

5.3 Combinational PLDs 337

5.4 Decoders 351

5.5 Encoders 376

5.6 Three-State Devices 385

5.7 Multiplexers 398

5.8 Exclusive-OR Gates and Parity Circuits 410

5.9 Comparators 419

5.10 Adders, Subtractors, and ALUs 430

5.11 Combinational Multipliers 446

References 455

Drill Problems 456

Exercises 459

6 COMBINATIONAL-CIRCUIT DESIGN EXAMPLES 467

6.1 Building-Block Design Examples 468

6.2 Design Examples Using ABEL and PLDs 479

6.3 Design Examples Using VHDL 500

Exercises 527

7 SEQUENTIAL LOGIC DESIGN PRINCIPLES 529

7.1 Bistable Elements 531

7.2 Latches and Flip-Flops 534

7.3 Clocked Synchronous State-Machine Analysis 550

7.4 Clocked Synchronous State-Machine Design 563

7.5 Designing State Machines Using State Diagrams 584

7.6 State-Machine Synthesis Using Transition Lists 591

7.7 Another State-Machine Design Example 594

7.8 Decomposing State Machines 602

7.9 Feedback Sequential Circuits 604

7.10 Feedback Sequential-Circuit Design 615

7.11 ABEL Sequential-Circuit Design Features 627

7.12 VHDL Sequential-Circuit Design Features 641

References 644

Drill Problems 646

Exercises 650

8 SEQUENTIAL LOGIC DESIGN PRACTICES 659

8.1 Sequential-Circuit Documentation Standards 660

8.2 Latches and Flip-Flops 666

8.3 Sequential PLDs 681

8.4 Counters 693

8.5 Shift Registers 712

8.6 Iterative versus Sequential Circuits 747

8.7 Synchronous Design Methodology 750

8.8 Impediments to Synchronous Design 757

8.9 Synchronizer Failure and Metastability 764

References 784

Drill Problems 786

Exercises 788

9 SEQUENTIAL-CIRCUIT DESIGN EXAMPLES 795

9.1 Design Examples Using ABEL and PLDs 796

9.2 Design Examples Using VHDL 813

Exercises 829

10 MEMORY, CPLDS, AND FPGAS 831

10.1 Read-Only Memory 832

10.2 Read/Write Memory 854

10.3 Static RAM 854

10.4 Dynamic RAM 866

10.5 Complex Programmable Logic Devices 872

10.6 Field-Programmable Gate Arrays 882

References 891

Drill Problems 892

Exercises 892

11 ADDITIONAL REAL-WORLD TOPICS 895

11.1 Computer-Aided Design Tools 895

11.2 Design for Testability 902

11.3 Estimating Digital System Reliability 908

11.4 Transmission Lines, Reflections, and Termination 912

References 920

INDEX 923